About me
I am a research assistant at CHIPS lab, PES University advised by Prof. Madhura Purnaprajna. My research interests include designing digital systems on FPGAs, computer architecture, and heterogeneous computing.
Education
B.E, Electronics & Communication Engineering
PESIT Bangalore South Campus, Bengaluru
Experience
CHIPS Lab, PES University, Bengaluru
Research assistant
CAcHe Lab, Amrita Vishwa Vidyapeetham, Bengaluru
Research assistant
Publications
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Predicting the Performance of the Graph Algorithms on a RISCV-based Multi-Core Processor Cluster
M. R. Ashuthosh, A. Vinay, K. K. Nagar, M. Purnaprajna
TECHCON, Austin, Texas, USA, 2024 -
Accelerating BFS Algorithm on a RISC-V based Many-Core Cluster
M. R. Ashuthosh, A. Vinay, K. K. Nagar, M. Purnaprajna
Best Lightning Talk (Masters) in 30th IEEE International Conference on High Performance Computing, Data, & Analytics, Student Research Symposium, Goa, India, 2023 -
Enabling High-Level Design Strategies for High-Throughput and Low-power NB-LDPC Decoders
S. Subramaniyan, O. Ferraz, M. R. Ashuthosh, S. Krishna, G. Wang, J. R. Cavallaro, V. Silva, G. Falcao, M. Purnaprajna
IEEE Design & Test Journal, 2022 -
MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication
M. R. Ashuthosh, S. Krishna, V. Sudarshan, S. Subramaniyan, M. Purnaprajna
A. K. Choudary Best Paper Award in 35th International Conference on VLSI Design and 21st International Conference on Embedded Systems (VLSID), Bengaluru, India, 2022 -
Pushing the limits of energy efficiency for non-binary LDPC decoders on GPUs and FPGAs
S. Subramaniyan, O. Ferraz, M. R. Ashuthosh, S. Krishna, G. Wang, J. R. Cavallaro, V. Silva, G. Falcao, M. Purnaprajna
IEEE Workshop on Signal Processing Systems (SiPS), Coimbra, Portugal, 2020